Semiconductor packages and methods of forming same

A method comprising:

• encapsulating an integrated circuit die with a molding compound;
• forming a first dielectric layer over the integrated circuit die and the molding compound;
• forming a first conductive via in the first dielectric layer, the first conductive via being electrically coupled to a first die connector of the integrated circuit die;
• forming a second conductive via in the first dielectric layer, the second conductive via being over the molding compound adjacent the integrated circuit die;
• forming a first metallization pattern over the first dielectric layer;
• forming a second dielectric layer over the first dielectric layer, the first conductive via, the second conductive via, and the first metallization pattern;
• forming a third conductive via in the second dielectric layer, the third conductive via being electrically coupled to the first metallization pattern, wherein the first conductive via, the second conductive via, the first metallization pattern, and the third conductive via form an inductor or transformer;
• and
• forming an insulating layer over the third conductive via and the second dielectric layer, the insulating layer covering the third conductive via.

A method comprising:

• forming a first package comprising:
• forming an electrical connector over a carrier substrate;
• attaching a back side of a first die to the carrier substrate using an adhesive layer, the first die being adjacent the electrical connector;
• encapsulating the first die and the electrical connector with a molding compound;
• forming a first redistribution structure over the first die, the molding compound, and the electrical connector, the electrical connector being electrically coupled to the first redistribution structure, the first redistribution structure including a first integrated component, the first integrated component being an inductor or a transformer;
• and
• removing the carrier substrate.