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US 2019/0295926 A1Published application
Semiconductor package and method for manufacturing the same
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsChung Hao CHEN, Chin-Cheng KUO
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Abstract
A semiconductor package may include a substrate; a microelectromechanical device disposed on the substrate; an interconnection structure connecting the substrate to the microelectromechanical device; and a metallic sealing structure surrounding the interconnection structure.
Claims24
A semiconductor package, comprising:
- a substrate;
- a microelectromechanical device disposed on the substrate;
- an interconnection structure connecting the substrate to the microelectromechanical device;
- and
- a metallic sealing structure surrounding the interconnection structure.
2 more elements
A semiconductor package, comprising:
- a substrate having a first surface and a second surface opposite to the first surface, defining an opening, and comprising a conductive post disposed in the opening;
- a microelectromechanical device disposed on the substrate;
- an interconnection structure disposed between the substrate and the microelectromechanical device;
- a sealing structure disposed between the substrate and the microelectromechanical device;
- a first conductive pattern disposed on the first surface of the substrate and facing toward the microelectromechanical device;
- and
- a second conductive pattern disposed on the second surface of the substrate,
- wherein the first conductive pattern is electrically connected to the second conductive pattern through the conductive post, and
- the interconnection structure is surrounded by the sealing structure.
6 more elements
A method for manufacturing a semiconductor package, comprising:
- providing a substrate;
- providing a microelectromechanical device;
- and
- forming an interconnection structure and a sealing structure between the substrate and the microelectromechanical device.
1 more element
Dependencies are inferred from the claim text.