Non-volatile memory devices and methods of programming the same

A method of programming a three-dimensional (3D) non-volatile memory device including a first string selection line, a second string selection line, a third string selection line, a fourth string selection line, a plurality of word lines vertically stacked on a substrate, a first bit line group, a second bit line group, a third bit line group, and a fourth bit line group, the method comprising:

• programming first memory cells that are connected to a first word line among the plurality of word lines, the first string selection line, and first bit lines included in the first bit line group, in response to a first address and a first program command;
• then, programming second memory cells that are connected to the first word line, the second string selection line disposed between the first and third string selection lines, and the first bit lines, in response to a second address and a second program command;
• then, programming third memory cells that are connected to the first word line, the third string selection line disposed between the second and fourth string selection lines, and the first bit lines, in response to a third address and a third program command;
• then, programming fourth memory cells that are connected to the first word line, the fourth string selection line, and the first bit lines, in response to a fourth address and a fourth program command;
• and
• then, programming fifth memory cells that are connected to the first word line, the first string selection line, and second bit lines included in the second bit line group, in response to a fifth address and a fifth program command,
• wherein the first to fourth string selection lines extends in a first direction and are spaced apart from one another by a distance in a second direction, and
• wherein the first and second bit lines extends in the second direction.

A method of programming a three-dimensional (3D) non-volatile memory device including string selection lines, a plurality of word lines vertically stacked on a substrate, and bit line groups, the method comprising:

• receiving an address and a program command;
• converting the address into a corrected address including a word line address of the plurality of word lines, a bit line group address of the bit line groups, and a string selection line address of the string selection lines such that the string selection line address is at a lower bit than the bit line group address;
• and
• programming memory cells that are connected to one of the plurality of word lines, one of the string selection lines, and one of the bit line groups in response to the corrected address.