Array substrate and display panel

An array substrate comprising a display area and a non-display area surrounding the display area, and the display area comprising:

• at least one antistatic wiring;
• and
• a plurality of scan lines;
• wherein the at least one antistatic wiring is configured to conduct static electricity, and the at least one antistatic wiring and the plurality of scan lines are interlaced and insulated;
• the at least one antistatic wiring comprises an first wiring portion and a second wiring portion adjacent to each other, and the first wiring portion and the second wiring portion are located in different layers;
• the first wiring portion is interlaced with the plurality of scan lines, the second wiring portion is located on both sides of the plurality of scan lines, and/or the at least one antistatic wiring is located in a position in the display area near the non-display area;
• the display area further comprises a first functional layer, a second functional layer, a signal line layer, and a second metal layer sequentially arranged on the array substrate, and the second functional layer is configured to form a thin film transistor;
• the first functional layer comprises the first wiring portion;
• the second metal layer comprises the second wiring portion;
• a first through hole is defined on the second functional layer;
• the second wiring portion passes through the second functional layer via the first through hole to be connected to the first wiring portion.