Sigma delta modulator, integrated circuit and method therefor

An integrated circuit comprising a multi-bit continuous-time sigma-delta modulator, SDM, comprising:

• an input configured to receive an input analog signal;
• a first summing junction configured to subtract a feedback analog signal from the input analog signal;
• a loop filter configured to filter an output signal from the first summing junction:
• an analog-to-digital converter, ADC, configured to convert the filtered analog output signal to a digital output signal;
• and
• a feedback path for routing the digital output signal to the first summing junction, wherein the feedback path comprises a plurality of digital-to-analog converters, DACs, configured to convert the digital output signal to an analog form;
• wherein the multi-bit SDM is characterised in that the ADC comprises a plurality of N-bit comparator latches that are each locally time-interleaved with at least a pair of latches configured to function in a complementary manner and provide a combined complementary output.

A method for generating a multi-bit quantization digital output signal by a multi-bit continuous-time sigma-delta modulator, SDM, the method comprising:

• receiving an input analog signal;
• subtracting a feedback analog signal from the input analog signal in a first summing junction;
• filtering an output signal from the first summing junction:
• converting the filtered analog output signal to a digital output signal in an analog-to-digital converter, ADC;
• feeding back the digital output signal to the first summing junction, via a digital-to-analog converter, DAC, converting the digital output signal to an analog form;
• wherein the method is characterised by:
• operating a plurality of N-bit paired latches in a complementary manner;
• and
• providing a combined complementary output from the plurality of paired latches.