Differential output pgia architecture

A method for providing a scaled representation of an input signal to an analog-to-digital converter, the method comprising:

• receiving an input signal at a first JFET input amplifier and at a second JFET input amplifier;
• and
• selecting a gain of each of the first and second JFET input amplifiers, wherein selecting the gain of each of the first and second JFET input amplifiers includes, in a first selection state, selectively coupling a first intermediate node of a resistor string of a plurality of resistor strings with a first input of the first JFET input amplifier, and selectively coupling a second intermediate node of the resistor string of the plurality of resistor strings with a first input of the second JFET input amplifier;
• receiving an output of the first JFET input amplifier at a first differential input of a differential amplifier;
• receiving an output of the second JFET input amplifier at a second differential input of the differential amplifier;
• and
• providing a differential output signal to the analog-to-digital converter, wherein a matched set of resistors determine a gain of the differential amplifier,
• wherein a first end node of the resistor string is coupled to an output of the first JFET input amplifier, and a second end node of the resistor string is coupled to an output of the second JFET input amplifier;
• wherein each resistor string of the plurality of resistor strings includes a plurality of resistors coupled in series, and wherein each resistor string of the plurality of resistor strings includes a first end node coupled to an output of the first JFET input amplifier and a second end node coupled to an output of the second JFET input amplifier;
• providing an output signal representative of the input signal scaled by the gain;
• and
• wherein the plurality of resistor strings includes a plurality of individual integrated circuits, each individual integrated circuit of the plurality of individual integrated circuits including one resistor string of the plurality of resistor strings.

An analog-to-digital converter (ADC) system comprising:

• a front-end circuit configured to receive an input signal and to provide a scaled, differential representation of the input signal;
• and
• an analog-to-digital converter (ADC) configured to receive the scaled, differential representation and to provide a digital representation of the input signal;
• wherein the front-end circuit includes:
• first and second input JFET amplifiers configured to receive an input signal;
• a gain selection circuit coupled to the first JFET input amplifier and the second JFET input amplifier;
• and
• a differential amplifier configured to receive an output of the first JFET input amplifier at a first differential input, to receive an output of the second JFET input amplifier at a second differential input, and to provide a differential output signal to the ADC as the scaled, differential representation of the input signal, the differential amplifier including a pair of matched resistors to set a gain of the differential amplifier;
• wherein the gain selection circuit comprises a plurality resistor strings, each resistor string including a plurality of resistors coupled in series, and wherein each string includes a first end node coupled to an output of the first JFET input amplifier and a second end node coupled to an output of the second JFET input amplifier;
• and
• wherein the plurality of resistor strings includes a plurality of individual integrated circuits, each individual integrated circuit of the plurality of individual integrated circuits including one resistor string of the plurality of resistor strings.