Fast startup bias current generator
AssigneeDialog Semiconductor (UK) Limited
InventorPranav Kotamraju
Life of this patent
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Abstract
A bias current generator is disclosed that include an operational amplifier that is self-biased during an inactive period with a bias current to bias a gate of an output transistor. Since the inactive period bias is close to an active period bias applied to the gate of the output transistor during active operation of the bias current generator, the speed of transition from the inactive period to the active period is enhanced by the self-biasing of the operational amplifier.
Claims19
A bias current generator, comprising:
- an output transistor;
- an operational amplifier having an output node connected a gate of the output transistor, wherein during an active mode of operation for the bias current generator the operational amplifier is configured to bias the output node responsive to a comparison of a feedback node voltage to a reference voltage so that the output transistor conducts a bias current during the active mode of operation;
- a current source configured to conduct a node-biasing current;
- a switching network configured to source the node-biasing current from an output of the operational amplifier during a dormant mode of operation in which output transistor does not conduct the bias current, wherein the bias current is greater than the node-biasing current;
- and
- a secondary current generator configured to mirror the bias current into a secondary current, wherein the bias current is greater than the secondary current, and wherein the secondary current is greater than the node-biasing current.
(canceled)
A method of operation for an operational amplifier including a first differential pair transistor having a gate connected to a terminal of an output resistor and having a second differential pair transistor having a gate connected to a voltage source providing a reference voltage and having a terminal connected to a gate of an output transistor having a terminal coupled to ground through a first switch and the output resistor, comprising:
- during an inactive period for the operational amplifier:
- opening the first switch to prevent the output transistor from conducting;
- and
- closing a second switch to charge the gate of the first differential pair transistor to a power supply voltage while conducting a node-biasing current through a channel of the first differential pair transistor and through a body diode of the second differential pair transistor in the operational amplifier to bias the gate of the output transistor with the node-biasing current;
- during an active period for an operational amplifier:
- closing the first switch and opening the second switch so that feedback through the operational amplifier causes the output transistor to conduct a bias current through the output resistor equaling a ratio of the reference voltage and a resistance for the output resistor, wherein the bias current is greater than the node-biasing current;
- and
- mirroring the bias current into at least one secondary current.
(canceled)
Dependencies are inferred from the claim text.