Transistor with Asymmetric Source and Drain Regions

A method of forming a semiconductor structure comprising:

• forming a layer of material over a substrate;
• forming mandrels over the layer of material;
• forming spacers on sidewalls of the mandrels;
• removing the mandrels via an etching procedure while leaving the spacers un-removed, wherein spacings between adjacent spacers include a first spacing and a second spacing that is not equal to the first spacing;
• after the removing of the mandrels, forming multiple gates in the layer of material by etching the layer of material, a pattern of the multiple gates being defined by a pattern of the spacers.

A method of forming a semiconductor structure comprising:

• forming a layer over a substrate;
• forming a plurality of mandrels over the layer, wherein the mandrels are spaced apart at a mandrel pitch comprising a drain side pitch and a source side pitch;
• forming a spacer layer over the mandrels;
• etching the spacer layer such that spacers abut both sides of each of the plurality of mandrels;
• removing the plurality of mandrels via an etching procedure;
• and
• forming a plurality of pairs of gates of a plurality of transistors in the layer by etching the layer, wherein a first distance between adjacent pairs of gates is based on the mandrel pitch, and wherein the first distance is different from a second distance between gates in each pair of gates.