Single electron transistors

A method of manufacturing a single electron transistor (SET device), comprising:

• forming an insulating support;
• providing a conductive material on at least one side face of the insulating support;
• after providing the conductive material, providing an insulating material on the conductive material and the insulating support to form a first assembly;
• forming a recess in the first assembly, wherein the recess extends into the insulating support and separates the conductive material into at least first and second separate conductive portions;
• providing a dielectric on sidewalls and bottom of the recess;
• and
• providing an island material in the recess on the dielectric.

A computing device, comprising:

• a processing device including one or more single electron transistors (SETs), wherein individual ones of the SETs include:
• first and second source/drain (S/D) electrodes, wherein the first S/D electrode is at a side face of a first insulating support and the second S/D electrode is at a side face of a second insulating support,
• an island, between the first and second S/D electrodes and extending into an area between the first and second insulating supports, and
• first and second portions of a dielectric, wherein the first portion of the dielectric is between the first S/D electrode and the island, and the second portion of the dielectric is between the second S/D electrode and the island;
• and
• a memory device, coupled to the processing device.