Lateral insulated-gate bipolar transistor and manufacturing method therefor

A method of manufacturing a lateral insulated-gate bipolar transistor, comprising:

• implanting N-type ions into a silicon wafer, and performing a drive-in to form an N-type buffer region;
• depositing a hard mask layer on a surface of the silicon wafer, and performing trench lithography and etching using a photoresist to etch the hard mask layer to form a trench window;
• etching silicon below the trench window to form a trench;
• performing a liner oxidation to form a liner oxide layer on an inner surface of the trench;
• wherein
• a thickness of the liner oxide layer at a sidewall of the trench is greater than a thickness of the liner oxide layer at a bottom of the trench;
• implanting P-type ions through the trench window, and the ions pass through the oxide layer and form a P well within an N-type buffer region around the trench;
• depositing an oxide layer in the trench, and forming an oxide film on the sidewall of the trench and a spacer structure at both sides of the bottom of the trench after etching the oxide layer;
• implanting N-type ions into the trench, and forming an N+ region by a self-aligned implantation under a blocking of the oxide film and the spacer;
• depositing a polysilicon in the trench, peeling off the hard mask layer after etching the polysilicon;
• performing annealing to the P well and the N+ region;
• and
• forming P+ junctions at both sides of the trench and N+ junctions at both sides of the P+ junction by lithography and etching.