Semiconductor device including an electrode lower layer and an electrode upper layer and method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, comprising the steps of:

• forming a ferroelectric material film made of a ferroelectric material;
• forming a first conductive material film made of a first conductive material on the ferroelectric material film, the first conductive material comprising an IrO2 film, an Ir film and an IrTa alloy film formed by stacking the IrO2 film, the Ir film and the IrTa alloy film in this order on the ferroelectric material film;
• forming a second conductive material film made of a second conductive material having an etching selection ratio with respect to the ferroelectric material and the first conductive material on the first conductive material film, the second conductive material having Titanium and Nitrogen;
• planarizing an upper surface of the second conductive material film by CMP so as to reduce a thickness of the second conductive material to 500 nm;
• forming an electrode upper layer consisting of the second conductive material film by patterning the second conductive material film after the planarization;
• and
• forming a ferroelectric film consisting of the ferroelectric material film and an electrode lower layer consisting of the first conductive material film by etching the ferroelectric material film and the first conductive material film while using the electrode upper layer as a mask,
• forming a hydrogen barrier film covering the ferroelectric film, the electrode lower layer and the electrode upper layer;
• forming an insulating film on the hydrogen barrier film;
• forming a via hole penetrating through the insulating film and the hydrogen barrier film from an upper surface of the insulating film to extend into the electrode upper layer in an intermediate portion in the thickness direction of the electrode upper layer;
• forming a barrier metal film on an inner surface of the via hole, and
• forming a plug material layer on the barrier metal film to fill the via hole,
• wherein an upper surface of the electrode lower layer includes at least one wave-shaped irregularity,
• wherein an interface between the electrode lower layer and the electrode upper layer defines a wave-shaped irregularity having a plurality of peaks in a cross-sectional view,
• wherein the via hole has a width which is wider than a distance between adjacent peaks of the wave-shaped irregularity, and
• a lower surface of the barrier metal film is placed between the highest peak of the plurality of peaks and an upper surface of the electrode upper layer in a vertical direction.