Method of fabricating semiconductor device

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate including two cell regions and a non-cell region provided therebetween;
• forming a lower structure on the cell regions and the non-cell region, the lower structure having a stepwise portion at the non-cell region;
• forming capacitors on the lower structure formed on the cell regions, wherein each of the capacitors includes a first electrode, a dielectric layer, and a second electrode;
• forming a plate electrode on the cell regions to form a first dummy pattern at the stepwise portion;
• and
• forming an insulating layer to cover the plate electrode and the first dummy pattern,
• wherein the lower structure includes
• word lines buried in the substrate on the cell regions;
• a first insulating layer covering the substrate on the cell regions and the non-cell region;
• and
• bit lines disposed on the first insulating layer and crossing over the word lines on the cell regions.

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate including a cell region and a non-cell region;
• forming a lower structure on the cell region and the non-cell region, the lower structure having a recess region at the non-cell region;
• forming a capacitor on the lower structure formed on the cell region, wherein the capacitor includes a first electrode, a dielectric layer, and a second electrode;
• and
• forming a plate electrode on the cell region and simultaneously forming a first dummy pattern in the recess region on the non-cell region,
• wherein the first dummy pattern includes a same material as the plate electrode,
• wherein the lower structure includes
• word lines buried in the substrate on the cell region,
• a first insulating layer covering the substrate on the cell region and the non-cell region, and
• bit lines disposed on the first insulating layer and crossing over the word lines on the cell region.

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate including a cell region and a non-cell region;
• forming word lines in the substrate on the cell region;
• forming a first insulating layer to cover the cell region and the non-cell region;
• forming bit lines on the first insulating layer to cross over the word lines on the cell region;
• forming a second insulating layer to cover the cell region and the non-cell region;
• removing a portion of the second insulating layer to form a recess region on the non-cell region;
• forming a capacitor on the second insulating layer on the cell region, wherein the capacitor includes a first electrode, a dielectric layer, and a second electrode;
• and
• forming a plate electrode on the cell region and forming a first dummy pattern in the recess region on the non-cell region.