High switching frequency, low loss and small form factor fully integrated power stage

A semiconductor device, comprising:

• a first circuit including a gate driver circuit of a power stage formed on a substrate in a first region, the substrate including a first semiconductor material;
• a second circuit formed on the substrate in a second region, the second circuit including one or more transistors having channels formed from a second semiconductor material different from the first semiconductor material and serving as power transistors of the power stage;
• and
• connections between the first circuit and respective gates of the transistors of the second circuit.

A method for fabricating a semiconductor device, comprising:

• forming a dielectric layer on a substrate including a first semiconductor material;
• forming a trench region within a first region of the substrate by removing a portion of the substrate and the dielectric layer;
• conformally depositing a spacer layer along the substrate and the dielectric layer;
• forming sidewalls within the trench by removing portions of the spacer layer;
• epitaxially growing a second semiconductor material within the trench region, the second semiconductor material being different from the first semiconductor material;
• planarizing down to the substrate after epitaxially growing the second semiconductor material;
• forming a cap layer on the first region;
• forming a first device on a substrate in a second region while the first region is capped by the cap layer;
• and
• forming a second device on the substrate in the first region, the second device including one or more transistors having channels including the second semiconductor material.