Manufacturing method and a related stackable chip package

A stackable chip package, comprising:

• a plurality of chips stacked as stacked chips and encapsulated via a substrate, the stacked chips having conductive elements exposed out of encapsulation by a removal of the substrate;
• a dielectric layer disposed on the stacked chips, the dielectric layer having openings aligned with the conductive elements;
• at least one redistribution layer disposed inside the openings to contact the conductive elements;
• and
• at least one external terminal disposed on the redistribution layer for providing an electrical transmission channel of the stackable chip package.