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US 2019/0244932 A1Published application
Semiconductor package including semiconductor chip
AssigneeSamsung Electronics Co., Ltd.
InventorsDoo Jin Kim, Young Sik Kim
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a first semiconductor chip disposed on a substrate. A first upward pad is disposed on an upper surface of the first semiconductor chip. A second semiconductor chip is arranged with an offset above the first semiconductor chip. A first downward pad is disposed on a lower surface of the second semiconductor chip. A first bonding wire connects the first upward pad and the substrate. A first inter-chip connector is interposed between the first upward pad and the first downward pad. A side surface of the second semiconductor chip is arranged above the first upward pad.
Claims21
A semiconductor package comprising:
- a package substrate
- a first semiconductor chip on the package substrate, the first semiconductor chip having an upper surface and a first upward pad disposed on the upper surface of the first semiconductor chip;
- a second semiconductor chip disposed on the first semiconductor chip as laterally offset relative to the second semiconductor chip, the second semiconductor chip having a lower surface and a first downward pad disposed on the lower surface of the second semiconductor chip;
- a first bonding wire extending between and electrically connecting the first upward pad and the package substrate;
- and
- a first inter-chip connector interposed between the first upward pad and the first downward pad,
- wherein a side surface of the second semiconductor chip overlies the first upward pad.
4 more elements
13-15. (canceled)
A semiconductor package comprising:
- a package substrate;
- a first semiconductor chip on the package substrate, the first semiconductor chip having an upper surface and a first upward pad disposed on the upper surface of the first semiconductor chip;
- a second semiconductor chip disposed on and laterally offset relative to the first semiconductor chip, the second semiconductor chip having a lower surface and a first downward pad disposed on the lower surface of the second semiconductor chip;
- and
- a first bonding wire extending between and electrically connecting the first upward pad and the package substrate,
- wherein the first downward pad contacts the first upward pad, and
- a side surface of the second semiconductor chip overlies the first upward pad.
4 more elements
A semiconductor package comprising:
- a printed circuit board;
- semiconductor chips stacked one on another on the printed circuit board, the uppermost one of the semiconductor chips of the semiconductor package being disposed on a lower one of the semiconductor chips;
- bonding wires electrically connecting the semiconductor chips to the printed circuit board;
- and
- an encapsulant encapsulating the semiconductor chips and the bonding wires on the printed circuit board,
- wherein the lower one of the semiconductor chips has an upper surface and an upward electrical connector disposed at the upper surface,
- the upward electrical connector has a first region, a second region and a third region of electrically conductive material integral with one another, the second region extending between and connecting the first and third regions,
- the uppermost one of the semiconductor chips of the semiconductor package has an upper surface, a side surface, a bottom surface and a downward pad of electrically conductive material at the bottom surface, a lower edge of the side surface of the uppermost one of the semiconductor chips overlying the second region of the upward electrical connector of the lower one of the semiconductor chips, and the downward pad facing and electrically connected to the upward electrical connector of the lower semiconductor chip at the third region of the upward electrical connector, and
- one of the bonding wires is electrically connected to the upward electrical connector of the lower one of the semiconductor chips at the first region of the upward electrical connector, whereby the uppermost one of the semiconductor chips is electrically connected to the printed circuit board through the upward electrical connector of the lower one of the semiconductor chips and said one of the bonding wires.
6 more elements
Dependencies are inferred from the claim text.