Methods for Reducing Dual Damascene Distortion
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao-Chun Wang, Chung-Chi Ko, Po-Cheng Shih
Life of this patent
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Abstract
An integrated circuit structure includes a first low-k dielectric layer having a first k value, and a second low-k dielectric layer having a second k value lower than the first k value. The second low-k dielectric layer is overlying the first low-k dielectric layer. A dual damascene structure includes a via with a portion in the first low-k dielectric layer, and a metal line over and joined to the via. The metal line includes a portion in the second low-k dielectric layer.
Claims20
An integrated circuit structure comprising:
- a first low-k dielectric layer having a first k value;
- a transition layer overlying the first low-k dielectric layer, the transition layer having a second k value lower than the first k value;
- a second low-k dielectric layer overlying the transition layer, the second low-k dielectric layer having a third k value lower than the second k value;
- and
- a dual damascene structure comprising:
- a via in the first low-k dielectric layer and the transition layer;
- and
- a metal line in the second low-k dielectric layer, wherein the metal line is over the transition layer.
An integrated circuit structure comprising:
- a first low-k dielectric layer having a first k value, wherein an entirety of the first low-k dielectric layer has a uniform first k value;
- a transition layer overlying and contacting the first low-k dielectric layer, wherein k values reduce from a bottom surface to a top surface of the transition layer;
- a second low-k dielectric layer overlying and contacting the transition layer, wherein the second low-k dielectric layer has a second k value lower than k values of the transition layer;
- and
- a dual damascene structure comprising:
- a via extending into both of the first low-k dielectric layer and the transition layer;
- and
- a metal line over and joining to the via, wherein an entirety of the metal line is in the second low-k dielectric layer.
An integrated circuit structure comprising:
- a first low-k dielectric layer having a first k value;
- a transition layer overlying the first low-k dielectric layer, wherein the transition layer has a second k value lower than the first k value, wherein the second k value is substantially uniform in the transition layer;
- a second low-k dielectric layer overlying the transition layer, the second low-k dielectric layer having a third k value lower than the second k value, and wherein the second low-k dielectric layer has a uniform k value;
- and
- a dual damascene structure comprising:
- a via in the first low-k dielectric layer and the transition layer;
- and
- a metal line in the second low-k dielectric layer.
Dependencies are inferred from the claim text.