Silicon carbide semiconductor device

A silicon carbide semiconductor device comprising:

• a silicon carbide semiconductor substrate including an active region and a termination region encircling the active region;
• a plurality of unit cells lying in the active region, each of the unit cells having a transistor structure;
• and
• a termination structure lying in the termination region, wherein
• the silicon carbide semiconductor device further comprises:
• an upper gate electrode including a gate pad and a gate wiring line extending from the gate pad, the upper gate electrode being electrically connected to respective gate electrodes of the plurality of unit cells;
• and
• an upper source electrode including a plurality of source pads including a first source pad and a second source pad that are arranged in the active region, the upper source electrode being electrically connected to source electrodes of the plurality of unit cells, wherein
• the gate wiring line includes a gate global wiring line extending in the termination region to encircle the plurality of source pads, and a gate connection wiring line extending from the gate pad to stretch between the first source pad and the second source pad in the active region, wherein
• the upper source electrode further includes an outer periphery source wiring line extending in the termination region to encircle the gate global wiring line, a first source connection connecting the outer periphery source wiring line to the first source pad, and a second source connection connecting the outer periphery source wiring line to the second source pad, wherein
• the silicon carbide semiconductor substrate, in a plan view, has a plurality of substrate corners including a first substrate corner and a second substrate corner, and the gate global wiring line is split at the first substrate corner and at the second substrate corner, wherein
• the gate global wiring line includes a first portion lying between the first substrate corner and the second substrate corner, a second portion split from the first portion at the first substrate corner, and a third portion split from the first portion at the second substrate corner, the first portion being in contact with the gate connection wiring line, and wherein
• the first source connection is disposed between the first portion and the second portion at the first substrate corner, and the second source connection is disposed between the first portion and the third portion at the second substrate corner.