Method of manufacturing a gate structure for a nonvolatile memory device

A method of manufacturing a gate structure for a nonvolatile memory device, the method comprising:

• forming a tunneling oxide layer on a substrate;
• forming a first polysilicon layer on the tunneling oxide layer;
• forming a photoresist pattern on the first polysilicon layer;
• performing a etching process using the photoresist pattern as etch mask against the first polysilicon layer to transform the first polysilicon layer into a first polysilicon layer pattern including floating gates and a select gate disposed between the floating gates;
• forming a gate dielectric layer on the tunneling oxide including the floating gates and the select gate;
• forming a second polysilicon layer on the gate dielectric layer;
• forming a hard mask pattern on the second polysilicon layer;
• and
• sequentially patterning the second polysilicon layer and the gate dielectric layer through an etching process using the hard mask pattern to form a second polysilicon layer pattern, a gate dielectric layer pattern on each of the floating gates.