Method and system for pin layout

A computer readable storage medium encoded with program instructions, wherein, when the program instructions is executed by at least one processor, the at least one processor performs a method comprising the steps of:

• selecting a cell;
• determining whether a pin has an area smaller than a predetermined area;
• allowing a pin access of the pin to extend in a corresponding patterning track of the pin access when the pin is determined to be having an area smaller than the predetermined threshold;and
• causing an integrated circuit to be fabricated according to the pin.

A system, comprising one or more processors and a computer readable storage medium encoded with program instructions, wherein, when the program instructions is executed by the one or more processors, the program instructions cause the system to:

• select a cell;
• determine whether a first pin access of a first pin and a second pin access of a second pin disposed adjacent to the first pin in the cell are on a same patterning track;
• separate the first pin and the second pin from each other by a first predetermined distance when the first pin access and the second pin access are determined to not be on a same patterning track;
• determine whether a third pin access of a third pin and a fourth pin access of a fourth pin disposed adjacent to the third pin in the cell are on a same patterning track;
• separate the third pin and the fourth pin from each other by a second predetermined distance when the third pin access and the fourth pin access are determined to be on a same patterning track, the second predetermined distance being less than the first predetermined distance;
• and
• cause an integrated circuit to be fabricated according to the first pin, the second pin, the third pin, and the fourth pin.