Buried mim capacitor structure with landing pads
AssigneeInternational Business Machines Corporation
InventorsAlexander Reznicek, Praneet Adusumilli, Oscar van der Straten, Joshua Rubin
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Abstract
A buried metal-insulator-metal (MIM) capacitor with landing pads is formed between first and second semiconductor substrates. The landing pads provide increased area for contacting which may decrease the contact resistors of the capacitor. The area of the buried MIM capacitor can be varied to provide a tailored capacitance. The buried MIM capacitor is thermally stable since the MIM capacitor includes refractory metal or metal alloy layers as the capacitor plates.
Claims20
A semiconductor structure comprising:
- a first oxide layer located on a semiconductor substrate;
- a metal-insulator-metal (MIM) capacitor located on the first oxide layer, wherein the MIM capacitor comprises a first refractory metal or metal alloy layer, a dielectric material layer, and a second refractory metal or metal alloy layer;
- a second oxide layer located on the MIM capacitor;
- and
- a semiconductor material device layer located on the second oxide layer, wherein the first oxide layer includes a first landing pad embedded therein, and the second oxide layer includes a second landing pad embedded therein.
A method of forming a semiconductor structure, the method comprising:
- providing a first structure comprising a first oxide layer located on a surface of a first semiconductor substrate, the first oxide layer having an opening located therein, and a first refractory metal or metal alloy layer located above the first oxide layer and filling the opening;
- providing a second structure comprising a second semiconductor substrate, a second oxide layer having an opening located therein, and a second refractory metal or metal alloy layer located above the second oxide layer and filling the opening, wherein a dielectric material layer is present on at least one of the first refractory metal or metal alloy layer and the second refractory metal or metal alloy layer;
- bonding the first and second structures together such that second semiconductor substrate has a physically exposed surface;
- removing a portion of the second semiconductor substrate;
- and
- forming first and second trench isolation structures extending from a topmost surface of a remaining portion of the second semiconductor substrate and contacting a surface of the first semiconductor substrate.
A method of forming a semiconductor structure, the method comprising:
- providing a first structure comprising a first oxide layer located on a surface of a first semiconductor substrate, the first oxide layer having an opening located therein, a first refractory metal or metal alloy layer located above the first oxide layer and filling the opening, and a first dielectric material layer located on the first refractory metal or metal alloy layer;
- forming a second refractory metal or metal alloy layer on the first dielectric material layer;
- forming a second oxide layer above the second refractory metal or metal alloy layer, wherein the second oxide layer comprises a refractory metal or metal alloy structure embedded therein;
- providing a second structure comprising a second semiconductor substrate;
- bonding the first and second structures together;
- removing a portion of the second semiconductor substrate;
- and
- forming first and second trench isolation structures extending from a topmost surface of a remaining portion of the second semiconductor substrate and contacting a surface of the first semiconductor substrate.
Dependencies are inferred from the claim text.