US 2019/0173734 A1 · Out-of-band management of FPGA bitstreams

Abstract

Mechanisms for out-of-band (OOB) management of Field Programmable Gate Array (FPGA) bitstreams and associated methods, apparatus, systems and firmware. Under a first OOB mechanism, a management component, such as a baseband management controller (BMC) is coupled to a processor including an agent in a compute node that includes an FGPA. An FPGA bitstream file is provided to the BMC, and the agent reads the file from the BMC and streams the FPGA bitstream contents in the file to the FPGA to program it. Under second and third OOB mechanisms, a pointer to an FPGA bitstream file that identifies the location of the file that is accessible via a network or fabric is provided to the BMC or other management entity. The BMC/management entity forwards the pointer to BIOS running on the compute node or an agent on the processor. The BIOS or agent then uses the pointer to retrieve the FPGA bitstream file via the network or fabric, as applicable, and streams the FPGA bitstream to the FPGA to program it.

Claims25

Dependent claims

A method performed by a compute node including a processor coupled to a management controller via a first link and to a Field Programmable Gate Array (FPGA) via a second link, the compute node communicatively coupled to at least one of a fabric and a network, the method comprising:

accessing, via an out-of-band (OOB) mechanism, an FPGA bitstream file that is either stored on the compute node or at a location accessible via the fabric or network, the FPGA bitstream file including content comprising an FPGA bitstream;
and
programming, via the OOB mechanism, the FPGA by streaming the FPGA bitstream to the FPGA over the second link.

A non-transitory machine readable medium, having firmware instructions stored thereon, configured to be executed by a processor of a compute node having memory and a Field Programmable Gate Array (FPGA), the processor coupled to a management controller via a first link and to the FPGA via a second link, the compute node further having at least one of a fabric interface and a network interface, wherein the compute node is configured to be installed in a chassis, wherein when installed in the chassis said at least one of the fabric interface or network interface is coupled to a network or fabric, wherein the firmware instructions enable, upon execution, the compute node to:

one of receive or retrieve a pointer to an FPGA bitstream file from the management controller via the first link, the pointer to the FPGA bitstream file identifying a location at which the FGPA bitstream file is stored that is accessible via one of a fabric coupled to the fabric interface or a network coupled to the network interface, FPGA bitstream file including content comprising an FPGA bitstream,
retrieve the FPGA bitstream file from the location identified by the pointer, the FPGA bitstream file being retrieved by accessing one of the fabric or the network;
and
stream the FPGA bitstream over the second link to the FPGA to program the FPGA.

1 more element

Dependencies are inferred from the claim text.

Out-of-band management of FPGA bitstreams

Life of this patent

Out-of-band management of FPGA bitstreams

Life of this patent

Abstract

Claims25