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US 2019/0173485 A1Published application
Apparatus for overload recovery of an integrator in a sigma-delta modulator
AssigneeIntel IP Corporation
InventorsJohn G. KAUFFMAN, Krzysztof DUFRENE
Life of this patent
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Abstract
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
Claims20
An apparatus comprising:
- a bias generator including an amplifier coupled to a transistor which is controllable by a signal which indicates an overload in an output of an integrator;
- and
- a digital-to-analog converter (DAC) coupled to the bias generator, wherein the DAC is to increase its current when the transistor is turned on by the overload signal.
An apparatus comprising:
- an integrator;
- an analog-to-digital converter (ADC) coupled to the integrator, wherein the ADC is to detect an overload condition in an output of the integrator, wherein the output of the intragrtor is an input of the ADC;
- a bias generator including an amplifier coupled to a transistor which is controllable by a signal which indicates the overload condition;
- and
- a digital-to-analog converter (DAC) coupled to the bias generator, wherein the DAC is to increase its current when the transistor of the bias generator is turned on by the overload condition.
2 more elements
An apparatus comprising:
- an antenna;
- an integrated circuit (IC) coupled to the antenna, the IC including a sigma-delta modulator comprising:
- a loop filter including an integrator;
- an analog-to-digital converter (ADC) to quantize an output of the loop filter into a digital representation, the ADC including a detection circuit which is to detect an overload condition in the output of the loop filter;
- and
- a digital-to-analog converter (DAC) coupled to the output of the ADC and an input of the loop filter, wherein the DAC is to increase its current to the loop filter when the overload condition is detected;
- and
- a processor coupled to the IC.
5 more elements
Dependencies are inferred from the claim text.