Method and apparatus to reduce effect of dielectric absorption in sar adc
AssigneeAnalog Devices Global
InventorsSandeep Monangi, Mahesh Madhavan
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Abstract
A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.
Claims20
A successive approximation analog to digital converter comprising:
- a positive digital to analog converter (PDAC) and a negative digital to analog converter (NDAC) configured to provide respective test signals in response to each of multiple analog input signals;
- and
- shuffle control switch circuitry configured to shuffle a first capacitor between a coupling of the first capacitor within the PDAC and a coupling of the first capacitor within the NDAC after each conversion by the PDAC and NDAC of a selected one of the analog input signals to the respective test signals.
A method for reducing dielectric absorption of a successive approximation register analog to digital converter (SAR ADC) that includes a positive digital to analog converter (PDAC) and a negative digital to analog converter (NDAC), the method comprising:
- selecting different analog signals from among multiple analog signals;
- converting each analog signal that is selected from among the multiple analog signals to a sequence of digital code bits;
- and
- shuffling a first capacitor between a coupling of the first capacitor within the PDAC and a coupling of the first capacitor within the NDAC after each conversion of the selected analog signal by the PDAC and NDAC.
An apparatus reducing dielectric absorption of a successive approximation register analog to digital converter (SAR ADC) that includes a positive digital to analog converter (PDAC) and a negative digital to analog converter (NDAC), the apparatus comprising:
- means for selecting different analog signals from among multiple analog signals;
- means for converting each analog signal selected from among the multiple analog signals to a sequence of digital code bits;
- and
- means for shuffling a first capacitor between a coupling of the first capacitor within the PDAC and a coupling of the first capacitor within the NDAC after each conversion of the selected analog signal by the PDAC and NDAC.
Dependencies are inferred from the claim text.