Circuit for processing an input-signal voltage

Abstract

A circuit for processing an input-signal voltage, and including an input capacitance coupled between an input node of the circuit and a sense node of a comparator; a reference capacitance coupled to the sense node of the comparator; and a common mode switch coupled between the sense node and a reference node of the comparator. The circuit is configured to have the input capacitance set to a reference input voltage while the common mode switch is closed, and the input node set to the input-signal voltage while the common mode switch is open. The reference capacitance includes a plurality of capacitances, at least one of which is provided as a switched capacitance that is selectively controllable to configure the plurality of capacitances. A switched capacitance controller is configured to control the switched capacitance so as to compensate, at the sense node, a comparator offset voltage.

Dependencies are inferred from the claim text.