Semiconductor device and manufacturing method thereof

A semiconductor device, comprising:

• first channel layers and a second channel layer disposed over a substrate;
• a first source/drain region and a second source/drain region disposed over the substrate;
• a first source/drain epitaxial layer covering an upper portion of the first source/drain region, and a second source/drain epitaxial layer covering an upper portion of the second source/drain region;
• a first gate dielectric layer disposed on each of the first channel layers and a second gate dielectric layer disposed on the second channel layer;
• a gate electrode layer disposed on the first gate dielectric layer and the second gate dielectric layer;
• and
• sidewall spacers disposed on opposing side faces of the gate electrode layer, wherein:
• each of the first channel layers includes a semiconductor wire made of a first semiconductor material,
• the semiconductor wire passes through the first source/drain region and enters into an anchor region, and
• a bottom portion of the first source/drain region and a bottom portion of the second source/drain region are covered by an insulating layer made of a same material as the sidewall spacers.

A semiconductor device, comprising:

• a fin structure having a channel layer, source/drain regions and anchored regions;
• source/drain epitaxial regions covering an upper portion of the source/drain regions;
• a gate dielectric layer disposed on the channel layer;
• a gate electrode layer disposed on the gate dielectric layer;
• and
• sidewall spacers disposed on opposing side faces of the gate electrode layer, wherein:
• the anchored regions are embedded in anchor regions,
• the channel layer includes first semiconductor layers and second semiconductor layers alternately stacked in a vertical direction,
• widths of the first semiconductor layers in the channel layer are smaller than widths of the second semiconductor layers in the channel layer,
• the widths of the first semiconductor layers in the channel layer are smaller than widths of the first semiconductor layers in the anchor region, and
• a bottom portion of the source/drain region is covered by an insulating layer made of a same material as the sidewall spacers.