Superjunction semiconductor device and method of manufacturing the same

A method, comprising:

• forming a plurality of first active pillars and a plurality of edge pillars in a first semiconductor layer including an active region and a termination region;
• forming a second semiconductor layer on the first semiconductor layer;
• forming a plurality of second active pillars and a plurality of preliminary charge balance layers in the second semiconductor layer;
• and
• annealning the first and second semiconductor layers such that the plurality of preliminary charge balance layers are diffused, and adjacent ones of the plurality of preliminary charge balance layers are connected, thereby forming a lower charge balance region.

A method, comprising:

• forming a termination region around an active region,
• forming, in the active region, a drift layer disposed on a semiconductor layer having a first conductivity type;
• forming, in the termination region, an upper edge region including:
• a lower charge balance region disposed on one side of the drift layer, the lower charge balance region having second conductivity type, the lower charge balance region having a tapered shape or a non-tapered shape, and
• an upper charge balance region disposed on the lower charge balance region, the upper charge balance region having the first conductivity.