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US 2019/0172792 A1Published application
Semiconductor packages
AssigneeSamsung Electronics Co., Ltd.
InventorJaeWook YOO
Life of this patent
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Abstract
A semiconductor package and a method of fabricating the same, the method including mounting semiconductor chips on a substrate; forming a mold layer that covers the semiconductor chips on the substrate; forming external terminals on a bottom surface of the substrate; forming a separation layer on the external terminals and the bottom surface of the substrate; cutting the substrate and the mold layer to separate the semiconductor chips from each other; and forming a shield surrounding the mold layer and a side surface of the substrate.
Claims21
-20. (canceled)
A semiconductor package, comprising:
- a substrate including an external terminal on a bottom surface thereof;
- a semiconductor chip mounted on a top surface of the substrate;
- a mold layer covering the semiconductor chip and the top surface of the substrate;
- a shield covering a top surface of the mold layer, a side surface of the mold layer, and a side surface of the substrate;
- and
- a separation layer on the bottom surface of the substrate,
- wherein the separation layer overlaps an edge portion of the bottom surface of the substrate, and
- the shield has a bottom surface that is coplanar with a bottom surface of the separation layer.
5 more elements
A semiconductor package, comprising:
- a substrate including a ground pattern embedded therein;
- an external terminal on a bottom surface of the substrate;
- a semiconductor chip mounted on a top surface of the substrate;
- and
- a shield covering a semiconductor chip and a side surface of the substrate, the shield is electrically connected to the ground pattern exposing at the side surface of the substrate;
- and
- a separation layer on the bottom surface of the substrate.
4 more elements
Dependencies are inferred from the claim text.