US 2019/0172769 A1 · SEMICONDUCTOR DIE WITH IMPROVED RUGGEDNESS

Abstract

A semiconductor die includes a substrate, a first passivation layer over the substrate, and a second passivation layer over the first passivation layer and the substrate. The substrate has boundaries defined by a substrate termination edge. The first passivation layer is over the substrate such that it terminates at a first passivation termination edge that is inset from the substrate termination edge by a first distance. The second passivation layer is over the first passivation layer and the substrate such that it terminates at a second passivation termination edge that is inset from the substrate termination edge by a second distance. The second distance is less than the first distance such that the second passivation layer overlaps the first passivation layer.

Claims22

Dependent claims

A semiconductor die comprising:

a substrate, the substrate having boundaries defined by a substrate termination edge;
a first passivation layer over the substrate, the first passivation layer terminating at a first passivation termination edge that is inset from the substrate termination edge by a first distance;
and
a second passivation layer over the first passivation layer and the substrate, the second passivation layer terminating at a second passivation termination edge that is inset from the substrate termination edge by a second distance, wherein the second distance is less than the first distance such that the second passivation layer overlaps the first passivation layer and the second passivation layer is directly coupled to the first passivation termination edge.

1 more element

Dependencies are inferred from the claim text.

Semiconductor die with improved ruggedness

Life of this patent

Semiconductor die with improved ruggedness

Life of this patent

Abstract

Claims22