Method for controlling transistor delay of nanowire or nanosheet transistor devices
AssigneeTokyo Electron Limited
InventorsJeffrey SMITH, Subhadeep Kal, Anton Devilliers
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AssigneeTokyo Electron Limited
InventorsJeffrey SMITH, Subhadeep Kal, Anton Devilliers
Estimating the term…
A method of manufacturing a semiconductor device includes: providing a substrate including a first stacked fin structure for forming a channel of a first gate-all-around (GAA) transistor, the first stacked fin structure including an initial volume of first channel material, and a second stacked fin structure for forming a channel of a second GAA transistor, the second stacked fin structure including an initial volume of second channel material; reducing said initial volume of the second channel material relative to the initial volume of first channel material by a predetermined amount corresponding to a delay of the first GAA transistor; and forming first and second GAA gate structures around said first channel material and said second channel material respectively.
A method of manufacturing a semiconductor device comprising:
A semiconductor device comprising:
A method of manufacturing a semiconductor device comprising:
Dependencies are inferred from the claim text.