Switching circuit

A method of matching an impedance comprising:

• coupling an RF input of a matching network to an RF source;
• coupling an RF output of the matching network to a plasma chamber, wherein the matching network comprises at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors having corresponding switches, the switches configured to switch in and out the discrete capacitors to alter a total capacitance of the EVC, wherein each switch comprises:
• a first terminal operably coupled to the corresponding discrete capacitor;
• a second terminal;
• a switching circuit coupled between the first terminal and the second terminal, the switching circuit comprising a switching transistor;
• and
• a tuning inductor coupled parallel to the switching circuit, wherein a value for the tuning inductor enables the tuning inductor to cancel a cumulative parasitic capacitance of the switching circuit;
• matching an impedance by, for at least one of the switches of the at least one EVC, turning the switching transistor ON or OFF to cause the corresponding discrete capacitor to be switched in or out.

A semiconductor processing tool comprising:

• a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate;
• and
• an impedance matching circuit operably coupled to the plasma chamber, matching circuit comprising:
• an RF input configured to operably couple to an RF source;
• an RF output configured to operably couple to the plasma chamber;
• and
• at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors having corresponding switches, the switches configured to switch in and out the discrete capacitors to alter a total capacitance of the EVC, wherein each switch comprises:
• a first terminal operably coupled to the corresponding discrete capacitor;
• a second terminal;
• a switching circuit coupled between the first terminal and the second terminal, the switching circuit comprising a switching transistor;
• and
• a tuning inductor coupled parallel to the switching circuit, wherein a value for the tuning inductor enables the tuning inductor to cancel a cumulative parasitic capacitance of the switching circuit;
• wherein for each switch, switching the switching transistor ON and OFF causes the corresponding discrete capacitor to be switched in and out.

A method of fabricating a semiconductor, the method comprising:

• placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate;
• energizing plasma within the plasma chamber by coupling RF power from an RF source into the plasma chamber to perform a deposition or etching;
• and
• while energizing the plasma, carrying out an impedance match by an impedance matching network coupled between a plasma chamber and an RF source, wherein the impedance matching network comprises:
• an RF input configured to operably couple to the RF source;
• an RF output configured to operably couple to the plasma chamber;
• and
• at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors having corresponding switches, the switches configured to switch in and out the discrete capacitors to alter a total capacitance of the EVC, wherein each switch comprises:
• a first terminal operably coupled to the corresponding discrete capacitor;
• a second terminal;
• a switching circuit coupled between the first terminal and the second terminal, the switching circuit comprising a switching transistor;
• and
• a tuning inductor coupled parallel to the switching circuit, wherein a value for the tuning inductor enables the tuning inductor to cancel a cumulative parasitic capacitance of the switching circuit;
• wherein for each switch, switching the switching transistor ON and OFF causes the corresponding discrete capacitor to be switched in and out.