Tracking of optimum read voltage thresholds in nand flash devices

A tangible, non-transitory, computer-readable media having instructions thereupon which, when executed by a processor, cause the processor to perform a method comprising:

• determining a first number of bit errors for a first read of data at an address in a flash memory at a previously determined optimum read voltage level;
• determining a second number of bit errors for a second read of the data at the address in the flash memory at a further read voltage level;
• adjusting the optimum read voltage level in a first direction of the further read voltage level, responsive to determining the second number of bit errors is less than the first number of bit errors;
• determining a third number of bit errors for a first read of data at a further address in the flash memory at the optimum read voltage level;
• determining a fourth number of bit errors for a second read of the data at the further address in the flash memory at a still further read voltage level;
• and
• adjusting the optimum read voltage level in a second direction, responsive to determining the fourth number of bit errors is greater than the third number of bit errors.

A storage system, comprising:

• flash memory;
• and
• one or more processors configurable to iterate:
• determining a first number of bit errors for a first read of data at an address in the flash memory at an optimum read voltage level determined in a previous iteration;
• determining a second number of bit errors for a second read of the data at the address in the flash memory at a further read voltage level;
• and
• adjusting the optimum read voltage level in a first direction of the further read voltage level when the second number of bit errors is less than the first number of bit errors and adjusting the optimum read voltage level in a second direction when the second number of bit errors is greater than the first number of bit errors.