Verifying proper operation of the instruction execution protection architecture
AssigneeInternational Business Machines Corporation
InventorsALI Y. DUALE, SHAILESH R. GAMI, JOHN L. WEBER, DENNIS WITTIG
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsALI Y. DUALE, SHAILESH R. GAMI, JOHN L. WEBER, DENNIS WITTIG
Estimating the term…
A computer-implemented method includes executing one or more tests on a computing device. The computing device has Instruction Execution Protection (IEP), and each test of the one or more tests includes selectively setting one or more IEP bits of one or more page tables, where each IEP bit prevents code in a respective storage block from being executed. During the one or more tests, an IEP exception is detected, by a computer processor, each time an attempt is made to execute code in a storage block for which a respective IEP bit is set. Test results of the one or more tests are determined based on the detecting. A remedial action is performed in response to the test results of the one or more tests.
A computer-implemented method comprising:
A system comprising:
A computer-program product for testing functionality of Instruction Execution Protection (IEP), the computer-program product comprising a computer-readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:
Dependencies are inferred from the claim text.