Processing apparatus, and semiconductor integrated circuit and boot method therefor
AssigneeSocionext Inc.
InventorsKazuya ASANO, Yuya UENO, Seiji GOTO
Life of this patent
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Abstract
A semiconductor integrated circuit generates second boot code by encrypting first boot code, and transmits, based on route information indicating a delivery route of the second boot code, encrypted data including the second boot code to a first destination via a network. A different semiconductor integrated circuit is the first destination, and receives the encrypted data via the network and generates third boot code by decrypting the second boot code.
Claims27
A processing apparatus comprising:
- a first semiconductor integrated circuit configured to generate a second boot code by encrypting a first boot code and transmit, based on first route information indicating a delivery route of the second boot code, first data including the second boot code to a first destination via a first network;
- and
- a second semiconductor integrated circuit configured to serve as the first destination and receive the first data via the first network, and generate the first boot code by decrypting the second boot code.
A semiconductor integrated circuit comprising:
- a communication circuit configured to generate a second boot code by encrypting a first boot code and transmit, based on first route information indicating a delivery route of the second boot code, first data including the second boot code to a first destination via a first network, and receive, from the first destination, an acknowledgement signal indicating that receipt of the first data is completed;
- and
- a control circuit configured to be connected to the communication circuit via a system bus, and cause, when the communication circuit receives the acknowledgement signal, the communication circuit to transmit, to the first destination via the first network, a boot instruction signal instructing the first destination to perform a boot process based on the first boot code.
A semiconductor integrated circuit comprising:
- a communication circuit configured to receive, via a first network, first data including an encrypted first boot code, transmit, to a source of the first data, an acknowledgement signal indicating that receipt of the first data is completed, and generate a second boot code by decrypting the first boot code;
- a memory circuit configured to be connected to the communication circuit via a system bus and store the second boot code therein;
- a control circuit configured to be connected to the communication circuit via the system bus and perform a boot process based on the second boot code;
- and
- a power supply control circuit configured to be connected to the communication circuit via the system bus and determine whether to start up the communication circuit and the control circuit.
A semiconductor integrated circuit boot method comprising:
- generating, by a first semiconductor integrated circuit, a second boot code by encrypting a first boot code;
- transmitting, by the first semiconductor integrated circuit, first data including the second boot code to a first destination via a first network, based on first route information indicating a delivery route of the second boot code;
- receiving, by a second semiconductor integrated circuit which is the first destination, the first data via the first network and generating the first boot code by decrypting the second boot code;
- and
- performing, by the second semiconductor integrated circuit, a boot process based on the first boot code.
Dependencies are inferred from the claim text.