Method of predicting areas of vulnerable yield in a semiconductor substrate

A computing system, comprising:

• a memory;
• and
• a processor configured to determine a defect in a critical area in a multi-layer semiconductor substrate, the processor to:
• receive information describing a defect on a first layer of the semiconductor substrate;
• identify a critical area of a second layer below the first layer of the semiconductor substrate;
• determine a probability of the defect migrating from the first layer to the critical area of the second layer;
• determine, based on the probability, the likelihood of an open or a short occurring as a result of the defect occurring in the critical area;
• and
• provide, based on the likelihood, predictive information to a manufacturing system, wherein corrective action is taken based on the predictive information in order to reduce or eliminate the likelihood of the open or short.

A non-transitory computer-readable medium comprising instructions that when executed by a computing device cause the computing device to perform operations, comprising:

• receiving information describing a defect on a first layer of the semiconductor substrate;
• identifying a critical area of a second layer below the first layer of the semiconductor substrate;
• determining a probability of the defect migrating from the first layer to the critical area of the second layer;
• determining, based on the probability, the likelihood of an open or a short occurring as a result of the defect occurring in the critical area;
• and
• instructing, based on the likelihood, a manufacturing system to take corrective action to reduce or eliminate the likelihood of the open or short.