Bit-interleaved bi-directional transmissions on a multi-drop bus for time-critical data exchange

A processor-readable storage medium having one or more instructions which, when executed by at least one processor or state machine of a processing circuit, cause the processing circuit to:

• pair with a second device in a transaction to be conducted over a serial bus;
• and
• for each cycle in a plurality of cycles of a clock signal transmitted on a clock line of the serial bus:
• transmit a first data bit to the second device over a data line of the serial bus in a first part of the each cycle;
• and
• receive a second data bit from the second device on the data line in a second part of the each cycle.

An apparatus operable to communicate data over a serial bus, comprising:

• a transceiver configured to couple the apparatus to the serial bus;
• and
• a processor coupled to the transceiver and configured to:
• pair the apparatus with a second device in a transaction to be conducted over the serial bus;
• and
• use the transceiver to exchange data with the second device by:
• transmitting a first data bit to the second device over a data line of the serial bus in a first part of each cycle in a plurality of cycles of a clock signal transmitted on a clock line of the serial bus;
• and
• receiving a second data bit from the second device on the data line in a second part of the each cycle.