Data processing system having lockstep operation

A data processing system comprising:

• a core domain coupled to a system bus, the core domain comprising:
• a first processing core comprising a first processor coupled to a first cache memory,
• a second processing core comprising a second processor coupled to a second cache memory, and
• a lockstep control circuit coupled to the first processing core and the second processing core, the lockstep control circuit configured to detect a fault by comparing output signals from the first processing core and the second processing core, enter a safe mode based upon the detected fault, and complete transactions while in the safe mode;
• and
• a controller coupled to the lockstep control circuit, the controller configured to determine whether the fault corresponds to a hard error, and responsive to the fault corresponding to the hard error, allow one of the first processing core and second processing core not associated with the hard error to continue executing instructions.

A method of operating a data processing system comprising:

• operating a core domain in a lockstep mode, the core domain comprising a first processing core shadowing a second processing core;
• detecting a fault by comparing output signals from the first processing core and the second processing core;
• entering a safe mode based upon detecting the fault, the safe mode isolating the core domain from a system bus;
• determining whether the fault corresponds to a hard error;
• identifying one of processing cores as a faulty core, the faulty core associated with the hard error;
• and
• based upon the fault corresponding to a hard error, inhibiting the faulty core from executing instructions and allowing the processing core not associated with the hard error to resume executing instructions.