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US 2019/0171456 A1Published application
Electronic device and method for processing instruction using the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHwee Soo KIM, Hyuk Min KWON, Won Jin KIM
Life of this patent
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Abstract
An electronic device including a memory; and a processor configured to generate an instruction code based on a same opcode when the same opcode is used in one or more slots defined in the memory upon application compiling.
Claims18
An electronic device comprising:
- a memory;
- and
- a processor configured to determine whether two or more slots of an execution unit of an instruction configured according to an instruction set architecture (ISA) have a same first opcode upon application compiling, and
- when the two or more slots have the same first opcode, the processor is further configured to generate an instruction code composed of the same first opcode and register index fields of one of the slots having the same first opcode, at least one register index field of at least one of the slots having the same first opcode other than the one of the slots, and state bits.
1 more element
A method of processing an instruction of an electronic device comprising a memory and a processor, the method comprising:
- determining by the processor whether two or more slots of an execution unit of an instruction configured according to an instruction set architecture (ISA) stored in the memory have a same first opcode upon application compiling;
- and
- when the two or more slots have the same first opcode, generating by the processor an instruction code composed of the same first opcode and register index fields of one of the slots having the same first opcode, at least one register index field of at least one of the slots having the same first opcode other than the one slot, and state bits.
An electronic device comprising:
- a memory configured to store an instruction set architecture (ISA);
- and
- a processor configured to determine whether two or more slots of an execution unit of an instruction configured according to the instruction set architecture (ISA) have a same first opcode upon application compiling, wherein each of the slots comprise an opcode field and register index fields, and
- when the two or more slots have the same first opcode, the processor is further configured to generate an instruction code including a single occurrence of the same first opcode, the register index fields of the two or more slots, and state bits.
1 more element
Dependencies are inferred from the claim text.