Power control for a dataflow processor

A computer program product embodied in a non-transitory computer readable medium for power conservation, the computer program product comprising code which causes one or more processors to perform operations of:

• configuring a plurality of interconnected processing elements and a plurality of instructions, wherein the plurality of instructions is contained within a plurality of circular buffers;
• setting a first processing element, from the plurality of interconnected processing elements, into a sleep state by a first instruction from the plurality of instructions, wherein the sleep state of the first processing element includes a low power state;
• and
• waking the first processing element from the sleep state as a result of valid data being presented to the first processing element, wherein the valid data is provided by a second processing element from the plurality of interconnected processing elements.

A computer system for power conservation comprising:

• a memory which stores instructions;
• one or more processors attached to the memory wherein the one or more processors, when executing the instructions which are stored, are configured to:
• configure a plurality of interconnected processing elements and a plurality of instructions, wherein the plurality of instructions is contained within a plurality of circular buffers;
• set a first processing element, from the plurality of interconnected processing elements, into a sleep state by a first instruction from the plurality of instructions, wherein the sleep state of the first processing element includes a low power state;
• and
• wake the first processing element from the sleep state as a result of valid data being presented to the first processing element, wherein the valid data is provided by a second processing element from the plurality of interconnected processing elements.