Multi-member test probe structure
AssigneeIntel Corporation
InventorsPooya Tadayon, Justin Huttula
Life of this patent
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AssigneeIntel Corporation
InventorsPooya Tadayon, Justin Huttula
Estimating the term…
A testing arrangement for testing Integrated Circuit (IC) interconnects is provided. In an example, the testing arrangement includes a substrate, and a first interconnect structure. The first interconnect structure may include a first member having a first end to attach to the substrate and a second end opposite the first end, and a second member having a first end to attach to the substrate and a second end opposite the first end. In some examples, the second end of the first member and the second end of the second member are to contact a second interconnect structure of a IC device under test, and the first end of the first member and the first end of the second member are coupled such that the first member and the second member are to transmit, in parallel, current to the second interconnect structure of the IC device under test.
A testing arrangement for testing Integrated Circuit (IC) interconnects, the testing arrangement comprising:
A system comprising:
A method comprising:
Dependencies are inferred from the claim text.