Package substrate integrated devices

A system comprising:

• a processor;
• a communication interface;
• and
• an integrated circuit device package, the integrated circuit device package comprising:
• an integrated circuit device coupled with one or more first conductive contacts on a first substrate surface;
• one or more second conductive contacts on a second substrate surface opposite the first substrate surface;
• a dielectric layer between the first and the second substrate surfaces;
• and
• an embedded capacitor on the dielectric layer conductively coupled with the integrated circuit device, wherein the embedded capacitor comprises a fixed metal layer in the dielectric layer and a flexible metal layer suspended over the fixed metal layer by one or more metal supports on the dielectric layer. and
• an elevated capacitor on the first substrate surface conductively coupled with the integrated circuit device, wherein the elevated capacitor comprises a fixed metal layer in the first substrate surface and a flexible metal layer suspended over the fixed metal layer by one or more metal supports on the first substrate surface.

A method of manufacturing a package substrate comprising:

• forming a first photoresist material over an embedded metal layer on a substrate surface;
• forming a second photoresist material over the first photoresist material, wherein the second photoresist material comprises a different photosensitivity than the first photoresist material;
• selectively exposing portions of the first and second photoresist materials to a first light level and a second light level, wherein the first light level changes solubility of both the first and second photoresist materials and the second light level changes solubility of the second photoresist material and doesn't change the solubility of the first photoresist material;
• applying developer to remove the soluble portions of the first and second photoresist materials;
• plating voids in the first and second photoresist layers to form an upper metal layer parallel to the embedded metal layer;
• and
• removing the first and second photoresist materials.