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US 2019/0164850 A1Published application
Semiconductor structure and testing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Shiang LIN, Chia-Cheng HO, Chun-Chieh LU, Cheng-Yi PENG, Chih-Sheng CHANG
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Abstract
A method for testing a semiconductor structure includes forming a dielectric layer over a test region of a substrate. A cap layer is formed over the dielectric layer. The dielectric layer and the cap layer are annealed. The annealed cap layer is removed. A ferroelectricity of the annealed dielectric layer is in-line tested.
Claims20
A method for testing a semiconductor structure, the method comprising:
- forming a dielectric layer over a test region of a substrate;
- forming a cap layer over the dielectric layer;
- annealing the dielectric layer and the cap layer;
- removing the annealed cap layer;
- and
- in-line testing a ferroelectricity of the annealed dielectric layer.
3 more elements
A method for testing a semiconductor structure, the method comprising:
- forming a first dummy pattern over a test region of the substrate;
- forming an interlayer dielectric over the substrate to surround the first dummy pattern;
- removing the first dummy pattern to form a first opening in the interlayer dielectric;
- forming a dielectric layer in the first opening;
- forming a cap layer over the dielectric layer;
- annealing the dielectric layer and the cap layer;
- removing the annealed cap layer in the first opening;
- and
- in-line testing a crystalline structure of the annealed dielectric layer in the first opening.
6 more elements
A semiconductor structure comprising:
- a substrate having a test region and a device region;
- a test pattern over the test region of the substrate, wherein the test pattern comprises:
- a ferroelectric dielectric layer over the substrate;
- and
- a plurality of metal layers over the ferroelectric dielectric layer;
- a gate structure over the device region of the substrate;
- and
- an interlayer dielectric over the metal layers and the gate structure with no conductor in the interlayer dielectric being electrically connected to the metal layers.
5 more elements
Dependencies are inferred from the claim text.