Semiconductor memory device
AssigneeToshiba Memory Corporation
InventorNayuta Kariya
Life of this patent
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Abstract
According to one embodiment, a semiconductor memory device includes a substrate, a plurality of electrode films arranged along a first direction with an air gap interposed, the first direction crossing a surface of the substrate, a semiconductor member extending in the first direction, a charge storage member provided between the semiconductor member and each of the electrode films, and a high dielectric constant film provided along an outer surface of the air gap, a relative dielectric constant of the high dielectric constant film being higher than a relative dielectric constant of silicon oxide.
Claims20
A semiconductor memory device, comprising:
- a substrate;
- a plurality of electrode films arranged along a first direction with an air gap interposed, the first direction crossing a surface of the substrate;
- a semiconductor member extending in the first direction;
- a charge storage member provided between the semiconductor member and each of the electrode films;
- and
- a high dielectric constant film provided along an outer surface of the air gap, a relative dielectric constant of the high dielectric constant film being higher than a relative dielectric constant of silicon oxide.
A semiconductor memory device, comprising:
- a substrate;
- a semiconductor member extending in a first direction and formed above the substrate, the first direction crossing a surface of the substrate;
- a first cell gate layer including a first control electrode and a first charge storage portion and being disposed to oppose a side surface of the semiconductor member, the first charge storage portion being provided between the first control electrode and the semiconductor member;
- a second cell gate layer including a second control electrode and a second charge storage portion and being disposed to oppose the side surface of the semiconductor member between the substrate and the first cell gate layer, the second charge storage portion being provided between the second control electrode and the semiconductor member;
- and
- an insulating film including a high dielectric constant film formed between the first cell gate layer and the second cell gate layer,
- the insulating film including a first portion, a second portion, and a third portion, the first portion being along a lower surface of the first cell gate layer, the second portion being along an upper surface of the second cell gate layer, the third portion being along the side surface of the semiconductor member, an air gap being disposed between the first portion and the second portion.
Dependencies are inferred from the claim text.