Pulsed integrator and memory techniques
AssigneeMicron Technology, Inc.
InventorsHernan A. Castro, Jeremy M. Hirst
Life of this patent
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Abstract
Methods, systems, and devices for a pulsed integrator and memory techniques are described. A first device may facilitate discharging a memory cell using at least one current pulse until a voltage associated with the memory cell reaches a reference voltage. The discharge time of the memory cell may be determined based at least in part on a duration of at least one current pulse. In some examples, a state of the memory cell may be determined based at least in part on a discharge time.
Claims25
A method for operating a memory array, comprising:
- discharging a memory cell using at least one current pulse until a voltage associated with the memory cell reaches a reference voltage;
- determining a discharge time based at least in part on a duration of the at least one current pulse;
- and
- determining a state of the memory cell based at least in part on the discharge time.
An electronic memory apparatus, comprising:
- a memory cell in electronic communication with a select line, the memory cell configured to store a plurality of logic states;
- a current sink in electronic communication with the select line, the current sink configured to discharge the memory cell using at least one current pulse until a voltage associated with the memory cell decreases to a reference voltage;
- a feedback component in electronic communication with the current sink, the feedback component configured to compare the voltage of the memory cell to the reference voltage;
- and
- a sense component configured to determine a state of the memory cell based at least in part on a discharge time.
An electronic memory apparatus, comprising:
- a memory cell in electronic communication with a select line;
- a current sink in electronic communication with the select line;
- a feedback component in electronic communication with the current sink;
- a controller in electronic communication with the memory cell, wherein the controller is operable to:
- discharge the memory cell using at least one current pulse until a voltage associated with the memory cell decreases to a reference voltage;
- determine a discharge time based at least in part on a duration of the at least one current pulse;
- and
- determine a state of the memory cell based at least in part on the discharge time.
Dependencies are inferred from the claim text.