Bi-directional weight cell

An integrated circuit, comprising:

• a plurality of weight cells arranged in a crossbar array having a plurality of columns and a plurality of rows;
• a pair of input lines for each row of the plurality of rows, the pair of input lines comprising a first input line and a second input line;
• and
• a pair of output lines for each column of the plurality of columns, the pair of output lines comprising a first output line and a second output line,
• wherein each weight cell of the plurality of weight cells comprises:
• a first bi-directional memory element comprising a first terminal and a second terminal, the first bi-directional memory element configured to switch between a first resistance state and a second resistance state different than the first resistance state;
• a second bi-directional memory element comprising a first terminal and a second terminal, the second bi-directional memory element configured to switch between the first resistance state and the second resistance state;
• a first diode connecting the second terminal to the first output line of the respective pair of output lines, the first diode oriented in forward bias from the first bi-directional memory element to the first output line;
• a second diode connecting the second terminal of the second bi-directional memory element to the second output line of the respective pair of output lines, the second diode oriented in reverse bias from the second bi-directional memory element to the second output line;
• a third diode connecting the second terminal of the first bi-directional memory element to the second output line, the third diode oriented in reverse bias from the first bi-directional memory element to the second output line;
• and
• a fourth diode connecting the second terminal of the second bi-directional memory element to the first output line, the fourth diode oriented in forward bias from the second bi-directional memory element to the first output line.