Semiconductor chip, semiconductor device and battery pack

A battery pack, comprising:

• a secondary battery capable of charging and discharging;
• and
• a semiconductor device which controls the secondary battery,
• wherein the semiconductor device includes:
• a control unit which controls the charging/discharging of the secondary battery;
• a bidirectional coupling unit which is electrically coupled to the control unit and through which a charging/discharging current flows;
• and
• a protection diode coupled between the control unit and the bidirectional coupling unit,
• wherein the bidirectional coupling unit includes:
• a discharging power transistor;
• a charging power transistor reversely coupled in series with the discharging power transistor;
• and
• a common drain pad which functions as a drain of the discharging power transistor and further functions as a drain of the charging power transistor,
• wherein an anode of the protection diode is electrically coupled to the common drain pad,
• wherein a cathode of the protection diode is electrically coupled to a power supply terminal of the control unit,
• wherein the semiconductor device further includes:
• a wiring board including a main surface;
• a control chip mounted over the main surface of the wiring board and formed with the control unit;
• a semiconductor chip mounted over the main surface of the wiring board and formed with the bidirectional coupling unit;
• and
• a diode chip mounted over the main surface of the wiring board and formed with the protection diode,
• wherein the semiconductor chip is formed at a surface thereof with:
• a first source pad which functions as a first source of the discharging power transistor;
• a first gate pad which functions as a first gate of the discharging power transistor;
• a second source pad which functions as a second source of the charging power transistor;
• a second gate pad which functions as a second gate of the charging power transistor;
• and
• the common drain pad, and
• wherein the semiconductor chip is mounted over the wiring board in a state in which the surface of the semiconductor chip is opposed to the main surface of the wiring board.

A semiconductor device, comprising:

• a semiconductor chip including:
• a first power transistor;
• and
• a second power transistor,
• wherein a first drain of the first power transistor and a second drain of the second power transistor are electrically coupled,
• wherein the semiconductor chip is formed at a surface thereof with:
• a first source pad which functions as a first source of the first power transistor;
• a first gate pad which functions as a first gate of the first power transistor;
• a second source pad which functions as a second source of the second power transistor;
• a second gate pad which functions as a second gate of the second power transistor;
• and
• a common drain pad which functions as the first drain of the first power transistor and further functions as the second drain of the second power transistor, and
• wherein the semiconductor device is formed with a circuit including the first power transistor and the second power transistor as components.