3dic package integration for high-frequency rf system
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorWen-Shiang LIAO
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Abstract
A three-Dimensional Integrated Circuit (3DIC) Chip on Wafer on Substrate (CoWoS) packaging structure or system includes a silicon oxide interposer with no metal ingredients, and with electrically conductive TVs and RDLs. The silicon oxide interposer has a first surface and a second surface opposite to the first surface. The electrically conductive TVs penetrate through the silicon oxide interposer. The electrically interconnected RDLs are disposed over the first surface of the silicon oxide interposer, and are electrically coupled or connected to a number of the conductive TVs.
Claims20
A method, comprising:
- forming a silicon oxide layer on a temporary carrier;
- forming through vias (TVs) penetrating through the silicon oxide layer;
- filling the TVs with a conductive material to form conductive TVs;
- forming redistribution lines (RDLs) over a first surface of the silicon oxide layer and electrically coupled or connected to a number of the conductive TVs;
- and
- removing the temporary carrier from a second surface of the silicon oxide layer opposite to the first surface.
A method, comprising:
- forming a silicon oxide layer on a temporary carrier;
- etching the silicon oxide layer to form through vias (TVs) penetrating through the silicon oxide layer;
- filling the TVs with a conductive material to form conductive TVs;
- removing the temporary carrier from a first surface of the silicon oxide layer;
- and
- forming an under bump metallurgy (UBM) layer contacting a first surface of the conductive material, wherein an interface between the UBM layer and the conductive material is coplanar with the first surface of the silicon oxide layer.
A method, comprising:
- spin coating a spin on glass (SOG) or spin on dielectric (SOD) material on a temporary carrier;
- curing the SOG or SOD material to form a silicon oxide layer on the temporary carrier;
- etching the silicon oxide layer to form through vias (TVs) penetrating through the silicon oxide layer;
- filling the TVs with a conductive material to form conductive TVs;
- forming redistribution lines (RDLs) over a first surface of the silicon oxide layer and electrically coupled or connected to a number of the conductive TVs;
- and
- removing the temporary carrier from a second surface of the silicon oxide layer opposite to the first surface of the silicon oxide layer.
Dependencies are inferred from the claim text.