Pseudo single pass nand memory programming

An electronic system, comprising:

• a host controller, wherein the host controller is to generate a first page of data, a second page of data, and a program command to program the first page of data and the second page of data into a multi-level NAND memory array within a NAND memory system;
• and
• the NAND memory system coupled to the host controller, wherein the NAND memory system includes:
• the multi-level NAND memory array including a first word line and a second word line;
• and
• a memory controller coupled to the host controller and the multi-level NAND memory array, wherein the memory controller is to:
• receive the first page of data, the second page of data, together with the program command from the host controller;
• program the first page of data into a page of the first word line via a first pass;
• and
• program the second page of data into a page of the second word line via a second pass, subsequent to the first pass.

One or more non-transitory computer-readable media comprising instructions that cause a memory controller, in response to execution of the instructions by the memory controller, to operate the memory controller to:

• receive a first page of data, a second page of data, together with a program command to program the first page of data and the second page of data into a multi-level NAND memory array coupled to the memory controller;
• program the first page of data into a page of a first word line of the multi-level NAND memory array via a first pass;
• and
• program the second page of data into a page of a second word line of the multi-level NAND memory array via a second pass subsequent to the first pass, wherein the multi-level NAND memory array includes the first word line and the second word line.