Strap cell design for static random access memory (sram) array

A static random access memory (SRAM) array, comprising:

• a first bit cell array and a second bit cell array arranged along a first direction;
• a strap cell arranged along a second direction and positioned between the first bit cell array and the second bit cell array along the first direction,
• wherein the strap cell comprises:
• a first strap column, comprising:
• a first P-type well (PW) region;
• and
• a first N-type well (NW) region and a second NW region adjacent to opposite sides of the first PW region along the first direction;
• a first strap row, comprising:
• the first NW region;
• and
• a second PW region and a third PW region on opposite sides of the first NW region;
• and
• a deep N-type well (DNW) region underlying and connected to the first NW region and the second NW region of the first strap column.

A static random access memory (SRAM) array, comprising:

• a first bit cell array and a second bit cell array arranged along a first direction;
• a strap cell arranged in a second direction and positioned between the first bit cell array and the second bit cell array along the first direction,
• wherein the strap cell comprises:
• a first strap column comprising a first P-type well (PW) region and two first N-type well (NW) regions adjacent opposite sides of the first PW region along the first direction;
• and
• a second strap column adjacent to the first strap column along the second direction, wherein the second strap column comprises:
• a second NW region and two second PW regions adjacent opposite sides of the second NW region along the first direction;
• a heavily doped P-type region overlying the first PW region and the two first NW regions of the first strap column;
• a heavily doped N-type region overlying the second NW region and the two second PW regions of the second strap column;
• and
• a deep N-type well (DNW) region underlying the two first NW regions and the second NW region.