Systems and methods for dynamic voltage and frequency scaling in programmable logic devices

An integrated circuit, comprising:

• a control circuit configured to:
• receive calibration design data from a processor, wherein the calibration design data comprises:
• one or more measurable critical paths associated with circuit design data related to the integrated circuit;
• one or more measurable synthetic tunable replica circuits (STRCs) configured to mimic the one or more measurable critical paths;
• and
• one or more heater circuits;
• program a plurality of programmable logic regions of the integrated circuit to implement the calibration design data;
• generate a calibration table comprising:
• a first set of measurements of the one or more measurable STRCs over a voltage sweep, frequency sweep, a temperature sweep, or any combination thereof;
• and
• a second set of measurements of the one or more measurable critical paths over the voltage sweep, frequency sweep, a temperature sweep, or any combination thereof;
• and
• tune one or more parameters of the one or more measurable STRCs based on the calibration table.