Vector network analyzer enabling device
AssigneeBAE Systems Information and Electronic Systems Integration Inc.
InventorDavid A. Lang
Life of this patent
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AssigneeBAE Systems Information and Electronic Systems Integration Inc.
InventorDavid A. Lang
Estimating the term…
A system and method for analyzing a device under test is provided. The system includes a signal source for generating an incident signal. The incident signal is routed to one or more inputs of the device under test. The system further includes signal separation and routing circuitry for measuring a portion of the incident signal to provide a reference signal and for separating the incident signal and a reflected signal at the one or more inputs of the device under test. The signal separation circuitry for separating the incident signal and the reflected signal at the input of the device under test is accomplished by a resistive device. The system may further include sampling device operationally coupled to the resistive device. The system and method may further include a signal switching mechanism for sequentially routing time slices of two or more signals to be coherently compared.
A system for analyzing a device under test comprising:
A system for the collection of two or more coherent signals comprising:
A method for the collection of two or more coherent signals comprising:
Dependencies are inferred from the claim text.